Introducing you to... Opteron
Published: 23 Apr 2003 15:49 BST
The Opteron chip introduces AMD's new 64-bit architecture, AMD64, and its X86-64 instruction set. This has tightly integrated 32-bit x86 and new 64 bit instructions: AMD hopes that this will give it advantages over both Intel's 32-bit only Xeon server chips and the 64-bit Itanium line with its bolted-on, sub-par Pentium compatibility.
Opteron is designed for workstation and server use, with a future related chip, the Athlon 64, due later this year and intended for desktops. All will have AMD's HyperTransport 3.2 gigabytes/second bi-directional interconnection bus, with the major differences between chips being how many HyperTransport channels they have, amount of on-chip cache and operating speed.
Opteron comes in three series: 100, 200 and 800. These have different levels of multiprocessing: uniprocessor, dual processor, and four or eight way configuration respectively. Multiprocessing happens over the HyperTransport bus, and because it's a cross-bar technology -- in effect making physical switched connections between different ports -- data access can move over a HyperTransport chip almost as if source and target components were directly connected.
Within each series, different model numbers have differing performance -- higher numbers have higher performance. These correspond to clock speeds, but AMD is continuing in its policy of de-emphasising raw GHz. However, for reference, the 200 series runs at 1.4GHz for the 240, 1.6GHz for the 242 and 1.8GHz for the 244.
Inside, the Opteron is very similar to the Athlon: it takes instructions and translates them to the chip's own internal format, corralling streams of these new instructions through three parallel sets of integer maths, logic and address generation units, or passing them to one of three specialist floating point units. Although data paths have been widened to cope with 64 bits versus 32 bits, most of the instructions are the same; it's a very straightforward approach to creating a wider processor. 32bit instructions can be run in 64bit mode by adding a prefix and vice-versa. There's also a 1 MB level two cache.
Opteron has its own memory controller built-in, which can address up to a terabyte (1024 GB) of external DDR SDRAM, and the chip has an internal 256 TB address space. This won't work with DDR2 or any other more advanced memory technology, when the chip's internal memory interface will have to be disabled and memory accessed through an external controller -- potentially an issue in the future. The Opteron has two 72-bit wide memory channels.
Physically, the chip fits into a new socket, Socket 940, which replaces the Athlon's Socket 462. The Athlon 64, with its single HyperTransport channel and one fewer memory port, will use a new intermediate Socket 754.
None of this would matter if there was no software for the chip, and here the Opteron has the advantage that many of its design improvements work well with existing 32-bit code. Furthermore, Sun, IBM, Microsoft, Red Hat and SuSe have announced varying degrees of support for the new chip. Linux needs the least changes, as it has been 64-bit compliant for a while and users can recompile their applications to take advantage of the Opteron's new features. Users of Windows and other closed-source operating systems will need to wait for the software companies to produce Opteron-optimised versions of operating systems and application software.
Intel is fighting back. There are persistent rumours of Yamhill, an AMD64-like processor under development within Intel. It may even be AMD64 compatible, as Microsoft has reportedly told Intel that there's no chance a special Yamhill version of Windows would be developed, although the politics involved in having to launch such a chip can only be dimly imagined. Intel has also developed a software patch for Itanium, btrans, that dramatically speeds up the chip's execution of 32-bit code, but this has yet to be released let alone benchmarked in the real world.
For the Opteron to be successful, it must be reliable and perform well. AMD has launched with very aggressive pricing -- the entry level Opteron costs around a quarter of the price of an entry level Itanium -- and the chip's commonality with the mature, well-established Athlon design, as well as its use of the tested and much-admired HyperTransport bus, means it has a good chance of proving reliable. With good support from the rest of the industry and initial test results showing that performance promises appear to be met, the long wait for AMD's next big thing looks like being rewarded.
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