Intel's two-way punch knocks out 45nm chips
Published: 30 Jan 2007 15:33 GMT
With Intel's announcement last Friday of a production-ready 45nm process for semiconductor production, the company is claiming an increased lead over its nearest rival AMD through the adoption of multiple new technologies. On the same day, IBM said that a similar process of its own would be going into production next year.
Intel is using its technological breakthrough — which involves two long-sought innovations to increase performance while holding down power consumption — to produce a new range of 45nm chips codenamed Penryn. Servers and desktops based on Penryn were demonstrated late last week. They should ship by the end of 2007, Intel chief executive Paul Otellini told journalists at the launch event.
Read this
Photos: Intel launches its 45nm chips
Paul Otellini shows how Intel's Penryn chips use new techniques to drive performance levels higher
Transistors of the sort used in modern processors have three connections, called the gate, source and drain. None of these touch each other: the source and the drain are areas containing dopants — impurities introduced to tune their electrical properties — separated by a region of pure silicon. The gate is made from more doped silicon configured in tiny crystals — called polysilicon. It bridges the source and the drain and overarches the pure silicon region, but is kept separate from all by a thin insulating layer. When a particular voltage is put onto the gate, the transistor is turned on and current can flow from the source to the drain; when the voltage is changed, the transistor turns off and no current flows. Exactly what voltage corresponds to which transistor state is up to the designers, within limits; it changes according to construction details. As long as two states can be distinguished for zero and one, everyone's happy.
Although current flows into and out of the gate when it's changing state — the electrical charge on the gate being what influences the current flowing between source and drain — when the gate's not changing it shouldn't have any current flow at all. Think of it like a balloon blocking a pipe: you can pump air into and out of the balloon and it will let or hinder the flow in the pipe. But the air in the balloon isn't used up in the process: you can retrieve it when you deflate the balloon. You don't need to keep pumping.
That's the theory: the practice is much more complicated. To date, the insulating layer between the gate and the rest of the transistor has been made from silicon dioxide. It's a good insulator and it's easy to make: just cook your silicon in oxygen. Unfortunately, it's not good enough: while shrinking transistors get faster, cheaper and more numerous, it also reduces the efficacy of the insulation layer. With 90nm and 65nm processors, the gate insulation layer is around 1.2nm thick — around five atoms. That's small enough that the electrons in the gate, which still can't get into the insulation layer, can find themselves on the other side through quantum tunnelling — the annoying habit subatomic particles have of obeying mathematics rather than common sense.
The trouble with making the insulating layer proportionally thicker is that it decreases the effect the gate has on the rest of the transistor — you have to work harder to make the transistor switch. That's no good for power consumption: likewise, making it thinner increases the tunnelling leakage current, to the point where tens of amps are lost even when nothing's happening. Although each transistor may lose only a few billionths of an amp, when chips have around a billion transistors that adds up.
To solve this problem, chip companies have long looked to new materials to replace silicon dioxide as the insulator. All insulators...
Previous
Did you find this article useful?
32 out of 32 people found this useful
- Share this article:
